low skew pll-based cmos clock driver (with 3-state).
* 0.5 MICRON CMOS Technology
* Input frequency range: 10MHz
– f2Q Max. spec (FREQ_SEL = HIGH)
* Max. output frequency: 133MHz
* Pin and f.
The IDT54/74FCT88915TT uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock. It provides low skew clock distribution for high performance PCs and workstations. One of the outputs
is fed back to the.
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