ICS831724I Datasheet Differential Clock/Data Multiplexer

Manufacturer: Integrated Device Technology

Datasheet Details

Part number	ICS831724I
Manufacturer	Integrated Device Technology
File Size	524.04 KB
Description	Differential Clock/Data Multiplexer
Download	ICS831724I Download (PDF)

The ICS831724I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer.

The device is designed for the multiplexing and fanout of high-frequency clock and data signals.

The device has two differential, selectable clock/data inputs.

Differential Clock/Data Multiplexer ICS831724I DATA SHEET General.

2:1 differential clock/data multiplexer with fanout.
Two selectable, differential inputs.
Each differential input pair can accept the following levels: HCSL, LVDS, LVPECL.
Four differential HCSL outputs.
Maximum input/output clock frequency: 350MHz.
Maximum input/output data rate: 700Mb/s (NRZ).
LVCMOS interface levels for all control inputs.
PCI Express Gen 1,2,3 jitter compliant.
Input skew: 165ps (maximum).

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