ICS831724I
Description
The ICS831724I is a high-performance, differential HCSL clock/data multiplexer and fanout buffer.
Key Features
- 2:1 differential clock/data multiplexer with fanout
- Two selectable, differential inputs
- Each differential input pair can accept the following levels: HCSL, LVDS, LVPECL
- Four differential HCSL outputs
- Maximum input/output clock frequency: 350MHz
- Maximum input/output data rate: 700Mb/s (NRZ)
- LVCMOS interface levels for all control inputs
- Input skew: 165ps (maximum)
- Output skew: 175ps (maximum)
- Part-to-part skew: 450ps (maximum)
