Datasheet4U Logo Datasheet4U.com

ICS83948I - 1-TO-12 DIFFERENTIALTO-LVCMOS/LVTTL FANOUT BUFFER

Description

Performance Clock Solutions from IDT.

The ICS83948I has two selectable clock inputs.

The CLK, nCLK pair can accept most standard differential input levels.

Features

  • Twelve LVCMOS/LVTTL outputs.
  • Selectable differential CLK/nCLK or LVCMOS/LVTTL clock input.
  • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL.
  • LVCMOS_CLK supports the following input types: LVCMOS, LVTTL.
  • Maximum output frequency: 250MHz.
  • Output skew: 350ps (maximum).
  • Part-to-part skew: 1.5ns (maximum).
  • 3.3V core, 3.3V output.
  • -40°C to 85°C ambient operating temperatu.

📥 Download Datasheet

Datasheet preview – ICS83948I

Datasheet Details

Part number ICS83948I
Manufacturer Integrated Device Technology
File Size 116.44 KB
Description 1-TO-12 DIFFERENTIALTO-LVCMOS/LVTTL FANOUT BUFFER
Datasheet download datasheet ICS83948I Datasheet
Additional preview pages of the ICS83948I datasheet.
Other Datasheets by Integrated Device Technology

Full PDF Text Transcription

Click to expand full text
LOW SKEW, 1-TO-12 DIFFERENTIALTO-LVCMOS/LVTTL FANOUT BUFFER General Description The ICS83948I is a low skew, 1-to-12 ICS Differential-to-LVCMOS/LVTTL Fanout Buffer and HiPerClockS™ a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. The ICS83948I has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The effective fanout can be increased from 12 to 24 by utilizing the ability of the outputs to drive two series terminated lines. The ICS83948I is characterized at full 3.3V core/3.3V output.
Published: |