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ICS854S204I Datasheet - Integrated Device Technology

LVPECL FANOUT BUFFER

ICS854S204I Features

* Two programmable differential LVDS or LVPECL output banks

* Two differential clock input pairs

* PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL, SSTL, CML

* Maximum output frequency: 3GHz

* Translates any single ended in

ICS854S204I General Description

The ICS854S204I is a low skew, high performance IC S dual, programmable 1-to-2 Differential-to-LVDS, HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClock S™ family of High Performance Clock Solutions from IDT. The PCLKx, nPCLKx pairs can accept most standard differential input levels. Wi.

ICS854S204I Datasheet (394.27 KB)

Preview of ICS854S204I PDF

Datasheet Details

Part number:

ICS854S204I

Manufacturer:

Integrated Device Technology

File Size:

394.27 KB

Description:

Lvpecl fanout buffer.

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ICS854S204I LVPECL FANOUT BUFFER Integrated Device Technology

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