Datasheet4U Logo Datasheet4U.com

ICS854S204I - LVPECL FANOUT BUFFER

Datasheet Summary

Description

The ICS854S204I is a low skew, high performance IC S dual, programmable 1-to-2 Differential-to-LVDS, HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClock S™ family of High Performance Clock Solutions from IDT.

The PCLKx, nPCLKx pairs can accept most standard differential input levels.

Features

  • Two programmable differential LVDS or LVPECL output banks.
  • Two differential clock input pairs.
  • PCLKx, nPCLKx pairs can accept the following differential input levels: LVDS, LVPECL, SSTL, CML.
  • Maximum output frequency: 3GHz.
  • Translates any single ended input signal to LVDS levels with resistor bias on nPCLKx inputs.
  • Output skew: 15ps (maximum).
  • Bank skew: 15ps (maximum).
  • Propagation delay: 500ps (maximum).
  • Additive.

📥 Download Datasheet

Datasheet preview – ICS854S204I

Datasheet Details

Part number ICS854S204I
Manufacturer Integrated Device Technology
File Size 394.27 KB
Description LVPECL FANOUT BUFFER
Datasheet download datasheet ICS854S204I Datasheet
Additional preview pages of the ICS854S204I datasheet.

📁 Similar Datasheet

  • ICS854S202I - Differential-to-LVDS Multiplexer (IDT)
  • ICS854S202I-01 - Differential-To-LVDS Multiplexer (Renesas)
  • ICS854S296I-33 - LVDS Programmable Delay-Line (Renesas)
  • ICS854S006I - Differential-to-LVDS Fanout Buffer (IDT)
  • ICS854S01I - 2:1 Differential-to-LVDS Multiplexer (Renesas)
  • ICS854S01I - 2:1 Differential-to-LVDS Multiplexer (IDT)
  • ICS854S054I - 4:1 Differential-to-LVDS Clock Multiplexer (Renesas)
  • ICS854S058I - 8:1 Differential-to-LVDS Clock Multiplexer (Renesas)
  • ICS854S54I-01 - Differential-to-LVDS Multiplexer (Renesas)
  • ICS85401 - 2:1 DIFFERENTIAL-TO-LVDS MULTIPLEXER (Integrated Circuit Systems)
Other Datasheets by Integrated Device Technology
  • ICS854S013 - 1-TO-3 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
  • ICS854S054I - 4:1 Differential-to-LVDS Clock Multiplexer
  • ICS854S057BI - 4:1 or 2:1 LVDS Clock Multiplexer
  • ICS854S058I - 8:1 Differential-to-LVDS Clock Multiplexer
  • ICS85411I - 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER
  • ICS8543I - Differential-to-LVDS Fanout Buffer
  • ICS8545-02 - 1-TO-4 LVCMOS/LVTTL-TO-LVDS FANOUT BUFFER
  • ICS8545I-02 - 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

Full PDF Text Transcription

Click to expand full text
LOW SKEW, DUAL, PROGRAMMABLE 1-TO-2 DIFFERENTIALTO-LVDS, LVPECL FANOUT BUFFER ICS854S204I GENERAL DESCRIPTION The ICS854S204I is a low skew, high performance IC S dual, programmable 1-to-2 Differential-to-LVDS, HiPerClockS™ LVPECL Fanout Buffer and a member of the HiPerClock S™ family of High Performance Clock Solutions from IDT. The PCLKx, nPCLKx pairs can accept most standard differential input levels. With the selection of SEL_OUT signal, outputs can be selected be to either LVDS or LVPECL levels. The ICS854S204I is characterized to operate from either a 2.5V or a 3.3V power supply. Guaranteed output and bank skew characteristics make the ICS854S204I www.DataSheet4U.com ideal for those clock distribution applications demanding well defined performance and repeatability.
Published: |