IDT72255
FEATURES
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- - 8,192 x 18-bit storage capacity (IDT72255) 16,384 x 18-bit storage capacity (IDT72265) 10ns read/write cycle time (8ns access time) Retransmit Capability Auto power down reduces power consumption Master Reset clears entire FIFO, Partial Reset clears data, but retains programmable settings Empty, Full and Half-full flags signal FIFO status Programmable Almost Empty and Almost Full flags, each flag can default to one of two preselected offsets Program partial flags by either serial or parallel means Select IDT Standard timing (using EF and FF flags) or First Word Fall Through timing (using OR and IR flags) Easily expandable in depth and width Independent read and write clocks (permit simultaneous reading and writing with one clock signal) Available in the 64-pin Thin Quad Flat Pack (TQFP), 64pin Slim Thin Quad Flat Pack (STQFP) and the 68-pin Pin Grid Array (PGA) Output enable puts data outputs into high impedance High-performance submicron CMOS...
