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IDT72T72105 - FIFO 72-BIT CONFIGURATIONS

General Description

The IDT72T7285/72T7295/72T72105/72T72115 are exceptionally deep, extremely high speed, CMOS First-In-First-Out (FIFO) memories with clocked read and write controls and a flexible Bus-Matching x72/x36/x18 data flow.

Flexible x72/x36/x18 Bus-Matc

Key Features

  • Choose among the following memory organizations: IDT72T7285  16,384 x 72 IDT72T7295  32,768 x 72 IDT72T72105  65,536 x 72 IDT72T72115  131,072 x 72 Up to 225 MHz Operation of Clocks User selectable HSTL/LVTTL Input and/or Output Read Enable & Read Clock Echo outputs aid high speed operation User selectable Asynchronous read and/or write por.

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Datasheet Details

Part number IDT72T72105
Manufacturer Integrated Device Technology
File Size 362.53 KB
Description FIFO 72-BIT CONFIGURATIONS
Datasheet download datasheet IDT72T72105 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 2.5 VOLT HIGH-SPEED TeraSyncTM FIFO 72-BIT CONFIGURATIONS 16,384 x 72, 32,768 x 72, 65,536 x 72, 131,072 x 72 IDT72T7285, IDT72T7295, IDT72T72105, IDT72T72115 FEATURES: • • • • • • • • • • • • • • • Choose among the following memory organizations: IDT72T7285  16,384 x 72 IDT72T7295  32,768 x 72 IDT72T72105  65,536 x 72 IDT72T72115  131,072 x 72 Up to 225 MHz Operation of Clocks User selectable HSTL/LVTTL Input and/or Output Read Enable & Read Clock Echo outputs aid high speed operation User selectable Asynchronous read and/or write port timing 2.5V LVTTL or 1.8V, 1.5V HSTL Port Selectable Input/Ouput voltage 3.