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RC32365 - IDT Interprise Integrated Communications Processor

Key Features

  • List x RC32300 32-bit CPU core.
  • 32-bit MIPS instruction set.
  • Supports big or lit tle endian operation.
  • MMU.
  • 16-entry TLB.
  • Supports varia ble page sizes and enhanced write algorithm.
  • Supports variable number of locked entries.
  • 8KB Instructio n Cache.
  • 2-way set associa tive.
  • LRU replacement algorithm.
  • 4 word lin e size.
  • Sub-block ordering.
  • Word parity.
  • Per line cache lockin g.

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Datasheet Details

Part number RC32365
Manufacturer Integrated Device Technology
File Size 669.94 KB
Description IDT Interprise Integrated Communications Processor
Datasheet download datasheet RC32365 Datasheet

Full PDF Text Transcription for RC32365 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for RC32365. For precise diagrams, and layout, please refer to the original PDF.

IDT T M InterpriseT M Integrated Communications Processor www.DataSheet4U.com RC32365 Device Overview The RC32365 device is a member of the IDT™ Interprise™ family of int...

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w The RC32365 device is a member of the IDT™ Interprise™ family of integrated communications processors. This device is designed to address a range of communications applications that require the efficient processing of IPSec algorithms. These applications inclu de gateways, wireless access poin ts, and virtual private network (VPN) equipment. The key to the RC32365’s efficient processin g of IPSec algorithms is a highly progammable security engine which off-loads the CPU core of encryptio n/decryptio n, hashing, and paddin g tasks.

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