Datasheet4U Logo Datasheet4U.com

IS64LPS12836A - 4Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM

Download the IS64LPS12836A datasheet PDF. This datasheet also covers the IS61LPS12836A variant, as both devices belong to the same 4mb synchronous pipelined single cycle deselect static ram family and are provided as variant models within a single manufacturer datasheet.

Description

The  ISSI IS61(64)LPS12832A, IS61(64)LPS/VP- S12836A and IS61(64)LPS/VPS25618A are high-speed, low-power synchronous static RAMs designed to provide burstable, high-performance memory for communication and networking applications.The IS61(64)LPS12832A is organized as 131,072 words by 32 bits.The IS6

Features

  • Internal self-timed write cycle.
  • Individual Byte Write Control and Global Write.
  • Clock controlled, registered address, data and control.
  • Burst sequence control using MODE input.
  • Three chip enable option for simple depth ex- pansion and address pipelining.
  • Common data inputs and data outputs.
  • Auto Power-down during deselect.
  • Single cycle deselect.
  • Snooze MODE for reduced-power standby.
  • Power Supply LPS: V.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IS61LPS12836A_IntegratedSiliconSolution.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
IS64LPS12836EC SINGLE CYCLE DESELECT SRAM ISSI
IS64LPS12832EC SINGLE CYCLE DESELECT SRAM ISSI
IS64LPS102436B 36Mb Single CYCLE DESELECT STATIC RAM ISSI
IS64LPS204818B 36Mb Single CYCLE DESELECT STATIC RAM ISSI
IS64LPS25618EC SINGLE CYCLE DESELECT SRAM ISSI

Other Datasheets by ISSI (now Infineon)

Part Number Description
IS64LPS12832A 4Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM
IS64LPS25618A 4Mb SYNCHRONOUS PIPELINED SINGLE CYCLE DESELECT STATIC RAM
IS64LV51216 (IS61LV51216 / IS64LV51216) 512K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM
IS64C25616AL 256K x 16 HIGH-SPEED CMOS STATIC RAM
IS64C25616AS 256K x 16 HIGH-SPEED CMOS STATIC RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
IS61(64)LPS12832A IS61(64)LPS12836A IS61(64)VPS12836A IS61(64)LPS25618A IS61(64)VPS25618A 128K x 32, 128K x 36, 256K x 18 DECEMBER 2013 4 Mb SYNCHRONOUS PIPELINED, Single CYCLE DESELECT STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control and Global Write • Clock controlled, registered address, data and control • Burst sequence control using MODE input • Three chip enable option for simple depth ex- pansion and address pipelining • Common data inputs and data outputs • Auto Power-down during deselect • Single cycle deselect • Snooze MODE for reduced-power standby • Power Supply LPS: Vdd 3.3V + 5%, Vddq 3.3V/2.5V + 5% VPS: Vdd 2.5V + 5%, Vddq 2.
Published: |