Datasheet Summary
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Intel StrataFlash Wireless Memory System (LV18 SCSP)
1024-Mbit LVX Family with LPSDRAM
Product Features
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Device Memory Architecture
- - Flash die density: 128-, 256-Mbit
- LPSDRAM die density: 128-, 256-Mbit
- Top or Bottom parameter flash configuration Device Voltage
- - Core: VCC = 1.8 V (typ.)
- I/O: VCCQ = 1.8 V (typ.) Device mon Performance
- - Buffered EFP: 5µs / Byte (typ.) per die
- Buffer Program: 7µs / Byte (typ.) per die
- Concurrent Buffered EFP: 6.4-Mbps effective with 4 flash dies Device mon Architecture .
- - Asymmetrical blocking structure
- 16-KWord parameter blocks (Top or Bottom); 64-KWord main blocks
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