LXT6234
Overview
- Performs four-E1 to one-E2, or four-E2 to one-E3 multiplexing. Five ICs will implement a sixteen-E1 to one-E3 multiplexer.
- Fully compliant with the G.742 and G.751 ITU recommendations. Fully compliant with G.703 when used with LXT305/332 Line Interface.
- A robust frame-acquisition and frameholding algorithm minimizes frame slippage, acquires and holds frame below 10-2 bit error rate.
- Four auxiliary low speed data or flag channels are available via the Stuffing Bits on each tributary channel.
- Access to the Alarm bit and the National bit. These can be used as recommended by ITU or for proprietary use.
- Five independent HDB3 CODECs allow multiplexer I/O in either HDB3
