n Performs four-E1 to one-E2, or four-E2 to one-E3 multiplexing. Five ICs will implement a sixteen-E1 to one-E3 multiplexer. n Fully compliant with the G.742 and G.751 IT.
n E1/E2 Multiplexer (2/8 Mbit/s) n E2/E3 Multiplexer (8/34 Mbit/s) n E1/E3 Multiplexer (2/34 Mbit/s) n Digital Loop Carr.
at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for confl.
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