N0450S - Process Geometry

InterFET

General Description

The InterFET N0450S Geometry is ideal for low noise high gain applications.

IFN363 IFN146 J108, J109, J110A S-D Test Pattern Product Summary Parameters BVGSS Gate to Source Breakdown Voltage IDSS Drain to Source Sat

Key Features

Low Noise: 1.0 nV/√Hz Typical.
Typical Input Capacitance: 28pF.
Typical Breakdown Voltage: -45V.
High Input Impedance.
Small Die: 670um X 670um X 203um.
Bond Pads: 90um X 90um.
Substrate Connected to Gate.
Au Back-Side Finish.

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N0450S process geometry by InterFET - Datasheet Preview

Datasheet Details

Part number	N0450S
Manufacturer	InterFET
File Size	348.01 KB
Description	Process Geometry
Datasheet	N0450S Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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InterFET Product Folder Technical Support Order Now N0450S N0450S Process Geometry Features • Low Noise: 1.0 nV/√Hz Typical • Typical Input Capacitance: 28pF • Typical Breakdown Voltage: -45V • High Input Impedance • Small Die: 670um X 670um X 203um • Bond Pads: 90um X 90um • Substrate Connected to Gate • Au Back-Side Finish Applications • Low-Current • Low Gate Leakage Current • Low Rds(on) Switch • Low Noise Amplifier • Audio Amplifiers • Mid to High-Gain Applications • Matched Pair Applications • Custom Part Options Description The InterFET N0450S Geometry is ideal for low noise high gain applications.