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IR2112-1PBF - HIGH AND LOW SIDE DRIVER

Download the IR2112-1PBF datasheet PDF. This datasheet also covers the IR2112PBF variant, as both devices belong to the same high and low side driver family and are provided as variant models within a single manufacturer datasheet.

General Description

The IR2112(S) is a high voltage, high speed power MOSFET and IGBT driver with independent high and 16-Lead SOIC (wide body) low side referenced output channels.

Proprietary HVIC 14-Lead PDIP and latch immune CMOS technologies enable ruggedized monolithic construction.

Key Features

  • Floating channel designed for bootstrap operation.
  • Fully operational to +600V.
  • Tolerant to negative transient voltage.
  • Gate drive supply range from 10 to 20V.
  • Undervoltage lockout for both channels.
  • 3.3V logic compatible.
  • Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propaga.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (IR2112PBF-InternationalRectifier.pdf) that lists specifications for multiple related part numbers.

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Other Datasheets by International Rectifier (now Infineon)

Part Number Description
IR2112-1SPBF HIGH AND LOW SIDE DRIVER
IR2112-2PBF HIGH AND LOW SIDE DRIVER
IR2112-2SPBF HIGH AND LOW SIDE DRIVER
IR2112 HIGH AND LOW SIDE DRIVER
IR2112PBF HIGH AND LOW SIDE DRIVER

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
Data Sheet No. PD60026 revS IR2112(-1-2)(S)PbF HIGH AND LOW SIDE DRIVER Features • Floating channel designed for bootstrap operation • Fully operational to +600V • Tolerant to negative transient voltage • Gate drive supply range from 10 to 20V • Undervoltage lockout for both channels • 3.3V logic compatible • • • • Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs dV/dt immune Product Summary VOFFSET IO+/VOUT ton/off (typ.) Delay Matching 600V max.