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82C55A - CMOS Programmable Peripheral Interface

General Description

VCC: The +5V power supply pin.

A 0.1F capacitor between VCC and GND is recommended for decoupling.

Key Features

  • Pb-Free Plus Anneal Available (RoHS Compliant) (See Ordering Info).
  • Pin Compatible with NMOS 8255A.
  • 24 Programmable I/O Pins.
  • Fully TTL Compatible.
  • High Speed, No “Wait State” Operation with 5MHz and 8MHz 80C86 and 80C88.
  • Direct Bit Set/Reset Capability.
  • Enhanced Control Word Read Capability.
  • L7 Process.
  • 2.5mA Drive Capability on All I/O Ports.
  • Low Standby Power (ICCSB).
  • . . . .10.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATASHEET 82C55A CMOS Programmable Peripheral Interface The 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The high performance and industry standard configuration of the 82C55A make it compatible with the 80C86, 80C88 and other microprocessors. Static CMOS circuit design insures low operating power. TTL compatibility over the full military temperature range and bus hold circuitry eliminate the need for pull-up resistors.