ACS630MS
Overview
The Intersil ACS630MS is a Radiation Hardened 16-bit parallel error detection and correction circuit. It uses a modified Hamming code to generate a 6-bit check word from each 16-bit data word.
- Devices QML Qualified in Accordance with MIL-PRF-38535
- Detailed Electrical and Screening Requirements are Contained in SMD# 5962-96711 and Intersil’ QM Plan
- 1.25 Micron Radiation Hardened SOS CMOS
- Single Event Upset (SEU) Immunity: <1 x 10 (Typ)
- Latch-Up Free Under Any Conditions
- Significant Power Reduction Compared to ALSTTL Logic
- Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min
- Input Current ≤ 1µA at VOL, VOH
