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CDP1882 Datasheet - Intersil Corporation

CDP1882 CMOS 6-Bit Latch and Decoder Memory Interfaces

The CDP1881C, CDP1882 and CDP1882C are CMOS 6-bit memory latch and decoder circuits intended for use in CDP1800 series microprocessor systems. They can interface directly with the multiplexed address bus of this system at maximum clock frequency, and up to four 4K x 8-bit memories to provide a 16K b.

CDP1882 Features

* Performs Memory Address Latch and Decoder Functions Multiplexed or Non-Multiplexed

* Decodes Up to 16K Bytes of Memory

* Interfaces Directly with CDP1800-Series Microprocessors at Maximum Clock Frequency

* Can Replace CDP1866 and CDP1867 (Upward Speed and Function C

CDP1882_IntersilCorporation.pdf