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HCTS32MS - Radiation Hardened Quad 2-Input OR Gate

General Description

The Intersil HCTS32MS is a Radiation Hardened Quad 2-Input OR Gate.

A Low on all inputs forces the output to a Low state.

The HCTS32MS utilizes advanced CMOS/SOS technology to achieve high-speed operation.

Key Features

  • 3 Micron Radiation Hardened SOS CMOS.
  • Total Dose 200K RAD (Si).
  • SEP Effective LET No Upsets: >100 MEV-cm2/mg.
  • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ).
  • Dose Rate Survivability: >1 x 1012 RAD (Si)/s.
  • Dose Rate Upset >10 10 RAD (Si)/s 20ns Pulse.
  • Latch-Up Free Under Any Conditions.
  • Military Temperature Range: -55oC to +125oC.
  • Significant Power Reduction Compared to LSTTL ICs.
  • DC Ope.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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HCTS32MS September 1995 Radiation Hardened Quad 2-Input OR Gate Pinouts 14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14 TOP VIEW A1 1 B1 2 Y1 3 A2 4 B2 5 Y2 6 GND 7 14 VCC 13 B4 12 A4 11 Y4 10 B3 9 A3 8 Y3 Features • 3 Micron Radiation Hardened SOS CMOS • Total Dose 200K RAD (Si) • SEP Effective LET No Upsets: >100 MEV-cm2/mg • Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) • Dose Rate Survivability: >1 x 1012 RAD (Si)/s • Dose Rate Upset >10 10 RAD (Si)/s 20ns Pulse • Latch-Up Free Under Any Conditions • Military Temperature Range: -55oC to +125oC • Significant Power Reduction Compared to LSTTL ICs • DC Operating Voltage Range: 4.5V to 5.5V • LSTTL Input Compatibility - VIL = 0.