Datasheet4U Logo Datasheet4U.com

MWS5101 - 256-Word x 4-Bit LSI Static RAM

General Description

The MWS5101 and MWS5101A are 256 word by 4-bit static random access memories designed for use in memory systems where high speed, very low operating current, and simplicity in use are desirable.

They have separate data inputs and outputs and utilize a single power supply of 4V to 6.5V.

Key Features

  • Industry Standard Pinout.
  • Very Low Operating Current.
  • . . . 8mA at VDD = 5V and Cycle Time = 1µs.
  • Two Chip Select Inputs Simple Memory Expansion.
  • Memory Retention for Standby.
  • . . . 2V (Min) Battery Voltage.
  • Output Disable for Common I/O Systems.
  • Three-State Data Output for Bus Oriented Systems.
  • Separate Data Inputs and Outputs.
  • TTL Compatible (MWS5101A) Pinout MWS5101, MWS5101A (P.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
MWS5101 256-Word by 4-Bit LSI Static Random-Access Memory GE
MWS5101A 256-Word by 4-Bit LSI Static Random-Access Memory GE
MWS5114 CMOS 1024-Word by 4-Bit LSI Static RAM GE
MWS020xxx 20W Standard Package Power-One
MWS11-GB11-xx InGaP HBT Gain Block Microsemi Corporation

Other Datasheets by Intersil (Renesas)

Part Number Description
MWS5101A 256-Word x 4-Bit LSI Static RAM
MWS5114 1024-Word x 4-Bit LSI Static RAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MWS5101, MWS5101A March 1997 256-Word x 4-Bit LSI Static RAM Description The MWS5101 and MWS5101A are 256 word by 4-bit static random access memories designed for use in memory systems where high speed, very low operating current, and simplicity in use are desirable. They have separate data inputs and outputs and utilize a single power supply of 4V to 6.5V. The MWS5101 and MWS5101A differ in input voltage characteristics (MWS5101A is TTL compatible). Two Chip Select inputs are provided to simplify system expansion. An Output Disable control provides Wire-OR capability and is also useful in common Input/Output systems by forcing the output into a high impedance state during a write operation independent of the Chip Select input condition.