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MWS5101A - 256-Word x 4-Bit LSI Static RAM

This page provides the datasheet information for the MWS5101A, a member of the MWS5101 256-Word x 4-Bit LSI Static RAM family.

Description

The MWS5101 and MWS5101A are 256 word by 4-bit static random access memories designed for use in memory systems where high speed, very low operating current, and simplicity in use are desirable.

They have separate data inputs and outputs and utilize a single power supply of 4V to 6.5V.

Features

  • Industry Standard Pinout.
  • Very Low Operating Current.
  • . . . 8mA at VDD = 5V and Cycle Time = 1µs.
  • Two Chip Select Inputs Simple Memory Expansion.
  • Memory Retention for Standby.
  • . . . 2V (Min) Battery Voltage.
  • Output Disable for Common I/O Systems.
  • Three-State Data Output for Bus Oriented Systems.
  • Separate Data Inputs and Outputs.
  • TTL Compatible (MWS5101A) Pinout MWS5101, MWS5101A (P.

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Datasheet preview – MWS5101A

Datasheet Details

Part number MWS5101A
Manufacturer Intersil Corporation
File Size 47.66 KB
Description 256-Word x 4-Bit LSI Static RAM
Datasheet download datasheet MWS5101A Datasheet
Additional preview pages of the MWS5101A datasheet.

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Full PDF Text Transcription

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MWS5101, MWS5101A March 1997 256-Word x 4-Bit LSI Static RAM Description The MWS5101 and MWS5101A are 256 word by 4-bit static random access memories designed for use in memory systems where high speed, very low operating current, and simplicity in use are desirable. They have separate data inputs and outputs and utilize a single power supply of 4V to 6.5V. The MWS5101 and MWS5101A differ in input voltage characteristics (MWS5101A is TTL compatible). Two Chip Select inputs are provided to simplify system expansion. An Output Disable control provides Wire-OR capability and is also useful in common Input/Output systems by forcing the output into a high impedance state during a write operation independent of the Chip Select input condition.
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