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Intersil Electronic Components Datasheet

RFP14N05L Datasheet

14A/ 50V/ 0.100 Ohm/ Logic Level/ N-Channel Power MOSFETs

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RFP14N05L pdf
RFD14N05L, RFD14N05LSM, RFP14N05L
Data Sheet
April 1999 File Number 2246.3
14A, 50V, 0.100 Ohm, Logic Level,
N-Channel Power MOSFETs
These are N-channel power MOSFETs manufactured using
the MegaFET process. This process, which uses feature
sizes approaching those of LSI integrated circuits, gives
optimum utilization of silicon, resulting in outstanding
performance. They were designed for use in applications
such as switching regulators, switching converters, motor
drivers and relay drivers. This performance is accomplished
through a special gate oxide design which provides full rated
conductance at gate bias in the 3V-5V range, thereby
facilitating true on-off power control directly from logic level
(5V) integrated circuits.
Formerly developmental type TA09870.
Ordering Information
PART NUMBER
PACKAGE
BRAND
RFD14N05L
TO-251AA
14N05L
RFD14N05LSM
TO-252AA
14N05L
RFP14N05L
TO-220AB
FP14N05L
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in the tape and reel, i.e., RFD14N05LSM9A.
Features
• 14A, 50V
• rDS(ON) = 0.100
• Temperature Compensating PSPICE™ Model
• Can be Driven Directly from CMOS, NMOS, and
TTL Circuits
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• 175oC Operating Temperature
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
D
G
S
Packaging
JEDEC TO-251AA
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
JEDEC TO-252AA
DRAIN (FLANGE)
GATE
SOURCE
JEDEC TO-220AB
DRAIN (FLANGE)
SOURCE
DRAIN
GATE
6-135
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999


Intersil Electronic Components Datasheet

RFP14N05L Datasheet

14A/ 50V/ 0.100 Ohm/ Logic Level/ N-Channel Power MOSFETs

No Preview Available !

RFP14N05L pdf
RFD14N05L, RFD14N05LSM, RFP14N05L
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
RFD14N05L, RFD14N05LSM,
RFP14N05L
50
50
± 10
14
Refer to Peak Current Curve
Refer to UIS Curve
48
0.32
-55 to 175
300
260
UNITS
V
V
V
A
W
W/oC
oC
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 150oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
Drain to Source Breakdown Voltage
Gate Threshold Voltage
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Turn-On Time
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-Off Time
Total Gate Charge
Gate Charge at 5V
Threshold Gate Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
BVDSS
VGS(TH)
IDSS
IGSS
rDS(ON)
t(ON)
td(ON)
tr
td(OFF)
tf
t(OFF)
Qg(TOT)
Qg(5)
Qg(TH)
CISS
COSS
CRSS
RθJC
RθJA
RθJA
ID = 250µA, VGS = 0V, Figure 13
VGS = VDS, ID = 250µA, Figure12
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TC = 150oC
VGS = ±10V
ID = 14A, VGS = 5V, Figures 9, 11
VDD = 25V, ID = 7A,
RL = 3.57, VGS = 5V,
RGS = 0.6
VGS = 0V to 10V
VGS = 0V to 5V
VGS = 0V to 1V
VDD = 40V, ID = 14A,
RL = 2.86
Figures 20, 21
VDS = 25V, VGS = 0V, f = 1MHz
Figure 14
TO-251 and TO-252
TO-220
50
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Source to Drain Diode Specifications
TYP
-
-
-
-
-
-
-
13
24
42
16
-
-
-
-
670
185
50
-
-
-
MAX
-
2
1
50
±100
0.100
60
-
-
-
-
100
40
25
1.5
-
-
-
3.125
100
80
UNITS
V
V
µA
µA
nA
ns
ns
ns
ns
ns
ns
nC
nC
nC
pF
pF
pF
oC/W
oC/W
oC/W
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2)
VSD ISD = 14A
- - 1.5 V
Diode Reverse Recovery Time
trr ISD = 14A, dISD/dt = 100A/µs
- - 125 ns
NOTES:
2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current
Capability Curve (Figure 5).
6-136


Part Number RFP14N05L
Description 14A/ 50V/ 0.100 Ohm/ Logic Level/ N-Channel Power MOSFETs
Maker Intersil Corporation
Total Page 8 Pages
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