ML145408 Datasheet | LANSDALE Semiconductor

feature true TTL input patibility, slew rate limiting outputs, 300 Ω power- off source impedance, and output typically switching to within 25% of the supply rails. The receivers can handle up to ± 25 V while presenting 3 to 7 kΩ impedance. Hysteresis in the receivers aid in the reception of noisy signals. By bining both drivers and receivers in a single CMOS chip, these devices provide efficient, low- power solutions for both EIA- 232- E and V .28 applications. These devices offer the following performance features : - Operating Temperature Range TA = - 40° to +85°C Drivers - ± 5 to ± 12 V Supply Range - 300 Ω Power- Off Source Impedance - Output Current Limiting - TTL and CMOS patible Inputs - Driver Slew Rate Range Limited to 30 V/µs Maximum Receivers - ± 25 V Input Range - 3 to 7 kΩ Input Impedance - 0.8 V of Hysteresis for Enhanced Noise Immunity - TTL and CMOS patible Outputs Available Driver/Receiver binations Device ML145403 ML145404 ML145405 ML145408 Drivers 3 4 5 5 Receivers 5 4 3 5 Figure 1 2 3 4 No. of Pins 20 20 20 24 Note: Lansdale lead free (Pb) product, as it bees available, will be identified by a part number prefix change from ML to MLE. Alternative EIA- 232 devices to consider are: Three Supply ML145406 (3 x 3) Single Supply ML145407 (3 x 3) Page 1 of 8 .lansdale. Issue A ML145403, ML145404, ML145405, ML145408 .. LANSDALE Semiconductor, Inc. PIN ASSIGNMENTS (DIP AND SOG) ML145403 3 DRIVERS/5 RECEIVERS VDD Rx1 Tx1 Rx2 Rx3 Tx2 Rx4 Rx5 Tx3 VSS 1 2 3 4 5 6 7 8 9 10 20 V CC R D R R D R R D 19 18 17 16 15 14 13 12 11 DO1 DI1 DO2 DO3 DI2 DO4 DO5 DI3 GND ML145404 4 DRIVERS/4 RECEIVERS VDD Rx1 Tx1 Rx2 Tx2 Rx3 Tx3 Rx4 Tx4 VSS 1 2 3 4 5 6 7 8 9 10 20 V CC R D R D R D R D 19 18 17 16 15 14 13 12 11 DO1 DI1 DO2 DI3 DO3 DI3 DO4 DI4 GND ML145405 5 DRIVERS/3 RECEIVERS VDD Rx1 Tx1 Tx2 Rx2 Tx3 Tx4 Rx3 Tx5 VSS 1 2 3 4 5 6 7 8 9 10 20 V CC R D D R D D R D 19 18 17 16 15 14 13 12 11 DO1 DI1 DI2 DO2 DI3 DI4 DO3 DI5 GND ML145408 5 DRIVERS/5 RECEIVERS VDD Rx1 Tx1 Rx2...