ISPPAC-CLK56xx Datasheet (In-System Programmable)

Part: ISPPAC-CLK56xx
Manufacturer: Lattice Semiconductor
Size: 888.01 KB

ISPPAC-CLK56xx Key Features

10MHz to 320MHz Input/Output Operation Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak (<60ps) Up to 20 Progra
Programmable output standards and individual enable controls
LVTTL, LVCMOS, HSTL, SSTL, LVDS, LVPECL
Programmable output impedance
40 to 70Ω in 5Ω increments
Programmable slew rate
Up to 10 banks with individual VCCO and GND
1.5V, 1.8V, 2.5V, 3.3V
Programmable lock detect
Multiply and divide ratio controlled by

Related Lattice Semiconductor Datasheets

Part Number	Description
ISPPAC-CLK56xxA	In-System Programmable
ISPPAC-CLK55xx	In-System Programmable Clock Generator with Universal Fan-Out Buffer
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ispPAC-POWR1014A	In-System Programmable Power Supply Supervisor / Reset Generator and Sequencing Controller
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ISPPAC-CLK56xx Description

and Overview The ispClock5610 and ispClock5620 are in-system-programmable high-fanout PLL-based clock drivers designed for use in high performance munications and puting applications. The ispClock5610 provides up to 10 single-ended or ﬁve differential clock outputs, while the ispClock5620 provides up to 20 single-ended or 10 differential clock outputs.