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ISPPAC-CLK56xxA Datasheet PDF

Lattice Semiconductor ISPPAC-CLK56xxA

In-System Programmable

Part No. ISPPAC-CLK56xxA
Datasheet ISPPAC-CLK56xxA Download
Manufacturer
Lattice Semiconductor
Description In-System Programmable
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ISPPAC-CLK56xxA datasheet page 1 preview

FEATURES

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● 8MHz to 400MHz Input/Output Operation Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak Up to 20 Programmable Fan-out Buffers
● Programmable output standards and individual enable controls - LVTTL, LVCMOS, HSTL, eHSTL, SSTL, LVDS, LVPECL, Differential HSTL, SSTL
● Programmable output impedance - 40 to 70Ω in 5Ω increments
● Programmable slew rate
● Up to 10 banks with individual VCCO and GND - 1.5V, 1.8V, 2.5V, 3.3V
● Up to Five Clock Frequency Domains
● Flexible Clock Reference and External Feedback Inputs
● Programmable input standards - LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, Differential HSTL, SSTL
● Clock A/B selection multiplexer
● Feedback A/B selection multiplexer
● Programmable termination
● All Inputs and Outputs are Hot Socket Compliant
● Four User-programmable Profiles Stored in E2CMOS® Memory
● Supports both test and multiple operating configurations
● Fully Integrated High-Performance PLL
● Programmable lock detect Programming Support
● Multiply an...
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