ISPPAC-CLK56xxA Overview
and Overview The ispClock5610A and ispClock5620A are in-system-programmable high-fanout enhanced zero delay clock generators desig.
ISPPAC-CLK56xxA Key Features
- 8MHz to 400MHz Input/Output Operation Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak Up to 20 Programmable Fa
- Programmable output standards and individual enable controls
- LVTTL, LVCMOS, HSTL, eHSTL, SSTL, LVDS, LVPECL, Differential HSTL, SSTL
- Programmable output impedance
- 40 to 70Ω in 5Ω increments
- Programmable slew rate
- Up to 10 banks with individual VCCO and GND
- 1.5V, 1.8V, 2.5V, 3.3V
- Up to Five Clock Frequency Domains
- Flexible Clock Reference and External Feedback Inputs