ISPPAC-CLK56xx Overview
and Overview The ispClock5610 and ispClock5620 are in-system-programmable high-fanout PLL-based clock drivers designed for use in high performance munications and puting applications. The ispClock5610 provides up to 10 single-ended or five differential clock outputs, while the ispClock5620 provides up to 20 single-ended or 10 differential clock outputs.
ISPPAC-CLK56xx Key Features
- 10MHz to 320MHz Input/Output Operation Low Output to Output Skew (<50ps) Low Jitter Peak-to-Peak (<60ps) Up to 20 Progra
- Programmable output standards and individual enable controls
- LVTTL, LVCMOS, HSTL, SSTL, LVDS, LVPECL
- Programmable output impedance
- 40 to 70Ω in 5Ω increments
- Programmable slew rate
- Up to 10 banks with individual VCCO and GND
- 1.5V, 1.8V, 2.5V, 3.3V
- Programmable lock detect
- Multiply and divide ratio controlled by