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MACRONIX

MX25R8035F Datasheet Preview

MX25R8035F Datasheet

Ultra Low Power 8M-BIT [x 1/x 2/x 4] CMOS MXSMIO FLASH MEMORY

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MX25R8035F
MX25R8035F
ULTRA LOW POWER, 8M-BIT [x 1/x 2/x 4]
CMOS MXSMIO® (SERIAL MULTI I/O)
FLASH MEMORY
Key Features
• Ultra Low Power Mode and High Performance Mode
• Wide Range VCC 1.65V-3.6V for Read, Erase and Program Operations
• Unique ID and Secure OTP Support
• Multi I/O Support - Single I/O, Dual I/O and Quad I/O
• Program Suspend/Resume & Erase Suspend/Resume
P/N: PM2164
Rev. 1.6, October 27, 2017
1




MACRONIX

MX25R8035F Datasheet Preview

MX25R8035F Datasheet

Ultra Low Power 8M-BIT [x 1/x 2/x 4] CMOS MXSMIO FLASH MEMORY

No Preview Available !

MX25R8035F
Contents
1. FEATURES............................................................................................................................................................... 4
2. GENERAL DESCRIPTION...................................................................................................................................... 6
Table 1. Additional Feature...........................................................................................................................7
3. PIN CONFIGURATIONS .......................................................................................................................................... 8
4. PIN DESCRIPTION................................................................................................................................................... 8
5. BLOCK DIAGRAM.................................................................................................................................................... 9
6. DATA PROTECTION............................................................................................................................................... 10
Table 2. Protected Area Sizes.................................................................................................................... 11
Table 3. 8K-bit Secured OTP Definition.....................................................................................................12
7. MEMORY ORGANIZATION.................................................................................................................................... 13
Table 4. Memory Organization...................................................................................................................13
8. DEVICE OPERATION............................................................................................................................................. 14
9. HOLD FEATURE..................................................................................................................................................... 16
10. COMMAND DESCRIPTION.................................................................................................................................. 17
Table 5. Command Set...............................................................................................................................17
10-1. Write Enable (WREN).............................................................................................................................. 20
10-2. Write Disable (WRDI).............................................................................................................................. 21
10-3. Read Identification (RDID)....................................................................................................................... 22
10-4. Factory Mode Enable (FMEN)................................................................................................................. 23
10-5. Read Electronic Signature (RES)............................................................................................................ 24
10-6. Read Electronic Manufacturer ID & Device ID (REMS)........................................................................... 25
10-7. ID Read.................................................................................................................................................... 26
Table 6. ID Definitions ...............................................................................................................................26
10-8. Read Status Register (RDSR)................................................................................................................. 27
10-9. Read Configuration Register (RDCR)...................................................................................................... 32
10-10. Write Status Register (WRSR)................................................................................................................ 33
Table 7. Protection Modes..........................................................................................................................34
10-11. Read Data Bytes (READ)........................................................................................................................ 37
10-12. Read Data Bytes at Higher Speed (FAST_READ).................................................................................. 38
10-13. Dual Read Mode (DREAD)...................................................................................................................... 39
10-14. 2 x I/O Read Mode (2READ)................................................................................................................... 40
10-15. Quad Read Mode (QREAD).................................................................................................................... 41
10-16. 4 x I/O Read Mode (4READ)................................................................................................................... 42
10-17. Burst Read............................................................................................................................................... 44
10-18. Performance Enhance Mode................................................................................................................... 45
10-19. Sector Erase (SE).................................................................................................................................... 47
10-20. Block Erase (BE32K)............................................................................................................................... 48
10-21. Block Erase (BE)..................................................................................................................................... 49
10-22. Chip Erase (CE)....................................................................................................................................... 50
10-23. Page Program (PP)................................................................................................................................. 51
10-24. Quad Input Page Program (QPP)............................................................................................................ 52
10-25. 4 x I/O Page Program (4PP).................................................................................................................... 53
10-26. Deep Power-down (DP)........................................................................................................................... 54
10-27. Enter Secured OTP (ENSO).................................................................................................................... 55
10-28. Exit Secured OTP (EXSO)....................................................................................................................... 55
P/N: PM2164
Rev. 1.6, October 27, 2017
2


Part Number MX25R8035F
Description Ultra Low Power 8M-BIT [x 1/x 2/x 4] CMOS MXSMIO FLASH MEMORY
Maker MACRONIX
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