Datasheet Details
| Part number | DS34S104 |
|---|---|
| Manufacturer | Maxim Integrated (now Analog Devices) |
| File Size | 1.38 MB |
| Description | (DS34S101 - DS34S108) Single/Dual/Quad/Octal TDM-over-Packet Chip |
| Datasheet |
 DS34S104 Datasheet
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General Description
These IETF PWE3 SAToP/CESoPSN/TDMoIP/HDLC compliant devices allow up to eight E1, T1 or serial streams or one high-speed E3, T3, STS-1 or serial stream to be transported transparently over IP, MPLS or Ethernet networks.
Key Features
- es Transport of E1, T1, E3, T3 or STS-1 TDM or CBR Serial Signals Over Packet Networks Full Support for These Mapping Methods: SAToP, CESoPSN, TDMoIP (AAL1), HDLC, Unstructured, Structured, Structured with CAS Adaptive Clock Recovery, Common Clock, External Clock and Loopback Timing Modes On-Chip TDM Clock Recovery Machines, One Per Port, Independently Configurable Clock Recovery Algorithm Handles Network PDV, Packet Loss, Constant Delay Changes, Frequency Changes and Other Impairments 64 Indepe.