Click to expand full text
19-3641; Rev 1; 10/07 www.datasheet4u.com
Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers
General Description
The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels. All these devices are hot-swappable and allow “on-the-fly” frequency programming. The MAX9234/MAX9236/MAX9238 feature DC balance, which allows isolation between a serializer and deserializer using AC-coupling. Each deserializer decodes data transmitted by one of the MAX9209/MAX9211/ MAX9213/MAX9215 serializers. The MAX9234 has a rising-edge output strobe.