MAX9238
Description
The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization.
Key Features
- DC Balance Allows AC-Coupling for Wider Input mon-Mode Voltage Range
- On-the-Fly Frequency Programming
- Falling-Edge Output Strobe (MAX9236/MAX9238)
- Slower Output Transitions for Reduced EMI (MAX9234/MAX9236)
- High-Impedance Outputs when PWRDWN Is Low Allow Output Busing
- 5V-Tolerant PWRDWN Input
- Up to 1.386Gbps Throughput
- Separate Output Supply Pins Allow Interface to 1.8V, 2.5V, 3.3V, and 5V Logic
- LVDS Inputs Meet ISO 10605 ESD Requirements
- LVDS Inputs Conform to ANSI TIA/EIA-644 LVDS Standard
