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MAX9234 - (MAX9234 - MAX9238) DC-Balanced LVDS Deserializers

General Description

The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs.

A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization.

The outputs have a separate supply, allowing 1.8V to 5V output logic levels.

Key Features

  • DC Balance Allows AC-Coupling for Wider Input Common-Mode Voltage Range.
  • On-the-Fly Frequency Programming.
  • Operating Frequency Range 8MHz to 34MHz (MAX9234/MAX9236) 16MHz to 66MHz (MAX9238).
  • Falling-Edge Output Strobe (MAX9236/MAX9238).
  • Slower Output Transitions for Reduced EMI (MAX9234/MAX9236).
  • High-Impedance Outputs when PWRDWN Is Low Allow Output Busing.
  • 5V-Tolerant PWRDWN Input.
  • PLL Requires No External Components.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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19-3641; Rev 1; 10/07 www.datasheet4u.com Hot-Swappable, 21-Bit, DC-Balanced LVDS Deserializers General Description The MAX9234/MAX9236/MAX9238 deserialize three LVDS serial-data inputs into 21 single-ended LVCMOS/LVTTL outputs. A parallel-rate LVDS clock received with the LVDS data streams provides timing for deserialization. The outputs have a separate supply, allowing 1.8V to 5V output logic levels. All these devices are hot-swappable and allow “on-the-fly” frequency programming. The MAX9234/MAX9236/MAX9238 feature DC balance, which allows isolation between a serializer and deserializer using AC-coupling. Each deserializer decodes data transmitted by one of the MAX9209/MAX9211/ MAX9213/MAX9215 serializers. The MAX9234 has a rising-edge output strobe.