MT29C4G96MAZAPCJG-5IT Datasheet | Micron Technology

atures NAND Flash and Mobile LPDDR 168-Ball Package-on-Package (Po P) MCP bination Memory (TI OMAP™) MT29C4G48MAYAPAKQ-5 IT, MT29C4G48MAZAPAKQ-5 IT, MT29C4G48MAZAPAKQ-6 IT, MT29C4G96MAZAPCJG-5 IT, MT29C4G96MAZAPCJG-6 IT, MT29C8G96MAZAPDJV-5 IT, MT29C8G96MAZAPDJV-6 IT Features Micron® NAND Flash and LPDDR ponents Ro HS-pliant, “green” package Separate NAND Flash and LPDDR interfaces Space-saving multichip package/package-on-package bination - Low-voltage operation (1.70- 1.95V) - Industrial temperature range: - 40°C to +85°C - - - - Figure 1: Po P Block Diagram NAND Flash Power NAND Flash Device NAND Flash Interface NAND Flash-Specific Features Organization - Page size - x8: 2112 bytes (2048 + 64 bytes) - x16: 1056 words (1024 + 32 words) - Block size: 64 pages (128K + 4K bytes) LPDRAM Power LPDRAM Device LPDRAM Interface Mobile LPDDR-Specific Features - - - - - - - - No external voltage reference required No minimum clock rate requirement 1.8V LVCMOS-patible inputs Programmable burst lengths Partial-array self refresh (PASR) Deep power-down (DPD) mode Selectable output drive strength STATUS REGISTER READ (SRR) supported1 Notes: 1. Contact factory for remapped SRR output. 2. For physical part markings, see Part Numbering Information (page 2). PDF: 09005aef83ba4387 168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf - Rev. F 03/10 ‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications....