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MT47H64M4 - (MT47HxxMx) DDR2 SDRAM

General Description

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Key Features

  • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V JEDEC standard 1.8V I/O (SSTL_18-compatible) Differential data strobe (DQS, DQS#) option Four-bit prefetch architecture Duplicate output strobe (RDQS) option for x8 configuration DLL to align DQ and DQS transitions with CK Four internal banks for concurrent operation Programmable CAS Latency (CL): 3 and 4 Posted CAS addi.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 256Mb: x4, x8, x16 DDR2 SDRAM DDR2 SDRAM Features • • • • • • • • • • • • • • VDD = +1.8V ±0.1V, VDDQ = +1.8V ±0.1V JEDEC standard 1.