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  Microsemi Electronic Components Datasheet  

ZL40235 Datasheet

Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

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Data Sheet
ZL40235
Low Skew, Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL
Fanout Buffer with one LVCMOS output
Features
3 to 1 input Multiplexer: Two inputs accept any
differential (LVPECL, HCSL, LVDS, SSTL, CML,
LVCMOS) or a single ended signal and the third
input accepts a crystal or a single ended signal
Five differential LVPECL/LVDS/HCSL outputs and
one LVCMOS output
Ultra-low additive jitter: 24fs (integration band 12kHz
to 20MHz at 625MHz clock frequency)
Supports clock frequencies from 0 to 1.6GHz
Supports 2.5V or 3.3V power supplies for LVPECL,
LVDS or HCSL outputs
Supports 1.5V, 1,8V, 2.5V or 3.3V power supplies
for LVCMOS output
Embedded Low Drop Out (LDO) Voltage regulator
provides superior Power Supply Noise Rejection
Maximum output to output skew of 40ps
Device controlled via SPI or hardware pins
Ordering Information
ZL40235LDG1
ZL40235LDF1
40 pin QFN Trays
40 pin QFN Tape and Reel
Package size: 6 x 6 mm
-40C to +85C
Applications
General purpose clock distribution
Low jitter clock trees
Logic translation
Clock and data signal restoration
Wired communications: OTN, SONET/SDH, GE, 10 GE,
FC and 10G FC
PCI Express generation 1/2/3/4 clock distribution
Wireless communications
High performance microprocessor clock distribution
Test Equipment
SEL
LVCMOS_OE/
SPI_CS_b
IN_SEL0/
SPI_CLK
IN_SEL1/
SPI_SDI
SPI_SDO
OUT_TYPE_SEL0
OUT_TYPE_SEL1
IN0_p
IN0_n
IN1_p
IN1_n
XOUT
XIN
OE
SPI_CS_b
IN_SEL0
SPI_CLK
IN_SEL1
SPI_SDIO
SPI Slave
Registers:
xtal_buf_gain[7:0]
xtal_drive_level[7:0]
xtal_load_cap[7:0]
input_select[1:0]
output_drive_low
driver_type[7:0] (diff)
driver_type[9:8] (diff)
cmos_div[2:0] (cmos)
output_enable (cmos)
driver_strength (cmos)
Device ID
ZL40235
Bank A
OUT0_p
OUT0_n
OUT1_p
OUT1_n
Bank B
OUT2_p
OUT2_n
OUT3_p
OUT3_n
OUT4_p
OUT4_n
DIV
1to8
OUT_LVCMOS
October 2018
© 2018 Microsemi Corporation
Figure 1. Functional Block Diagram
ZL40235
1


  Microsemi Electronic Components Datasheet  

ZL40235 Datasheet

Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer

No Preview Available !

Data Sheet
ZL40235
Table of Contents
Features..................................................................................................................................... 1
Applications................................................................................................................................ 1
Table of Contents ...................................................................................................................... 2
Pin Diagram ............................................................................................................................... 5
Pin Descriptions ......................................................................................................................... 6
Functional Description ............................................................................................................... 9
Clock Inputs ............................................................................................................................... 9
Clock Outputs .......................................................................................................................... 12
Crystal Oscillator Input............................................................................................................. 13
Termination of unused inputs and outputs .............................................................................. 13
Power Consumption ................................................................................................................ 13
Power Supply Filtering............................................................................................................. 14
Power Supplies and Power-up Sequence ............................................................................... 14
Host Interface .......................................................................................................................... 14
Typical device performance..................................................................................................... 19
Register Map ........................................................................................................................... 23
AC and DC Electrical Characteristics ...................................................................................... 29
Absolute Maximum Ratings ..................................................................................................... 29
Recommended Operating Conditions ..................................................................................... 29
Change History ........................................................................................................................ 48
Package Outline ...................................................................................................................... 49
October 2018
© 2018 Microsemi Corporation
ZL40235
2


Part Number ZL40235
Description Low Additive Jitter 3 x 5 LVPECL/LVDS/HCSL Fanout Buffer
Maker Microsemi
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ZL40235 Datasheet PDF






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