ZL40240 Datasheet | Microsemi

Features - 3 to 1 input Multiplexer: Two inputs accept any differential (LVPECL, HCSL, LVDS, SSTL, CML, LVCMOS) or a single ended signal and the third input accepts a crystal or a single ended signal - Ten 1.5V/1.8V/2.5V/3.3V LVCMOS outputs - Supports frequencies from 0 to 250MHz - Ultra-low system level additive jitter: 17fs (12k Hz to 20MHz) - Ultra-low noise floor of -170d Bc/Hz - Supports crystals from 8MHz to 160MHz - Supports 2.5V or 3.3V power supplies - Output to output skew of 30ps (typical) - Input to output delay of 2ns (typical) - SPI or Hardware control Ordering Information ZL40240LDG1 ZL40240LDF1 32 Pin QFN Trays 32 pin QFN Tape and Reel Package size: 5 x 5 mm -40C to +85C Applications - General purpose clock distribution - Low jitter clock trees - Logic translation - Clock and data signal restoration - Wired and Wireless munications - High performance microprocessor clock distribution - Medical Imaging - Test equipment OE/SPI_CS_b IN_SEL0/ SPI_CLK IN_SEL1/...