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PDSP16318 - PDSP16256GC1R

Datasheet Summary

Description

The PDSP16318 is a Dual 20-bit Adder/Subtractor configured to support Complex Arithmetic.

The device may be used with each of the adders allocated to real or imaginary data (e.g.

Complex Conjugation), the entire device allocated to Real or Imaginary Data (e.g.

Features

  • s s s s s s s s s s s s s s Full 20MHz Throughout in FFT.

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Datasheet preview – PDSP16318

Datasheet Details

Part number PDSP16318
Manufacturer Mitel Networks Corporation
File Size 88.71 KB
Description PDSP16256GC1R
Datasheet download datasheet PDSP16318 Datasheet
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Full PDF Text Transcription

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PDSP16318/16318A PDSP16318/PDSP16318A Complex Accumulator Advance Information Supersedes version DS3708 - 2.4 September 1996 DS3708 - 3.1 November 1998 The PDSP16318/A contains two independent 20-bit Adder/Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz throughout in FFT and filter applications. Two PDSP16318As combined with a single PDSP16112A Complex Multiplier provide a complete arithmetic solution for a Radix 2 DIT FFT Butterfly. A new complex Butterfly result can be generated every 50ns allowing 1K complex FFTs to be executed in 256µs.
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