a = 25°C (2) TIMING REQUIREMENTS (Ta = 0~70°C, Vcc=3.3±0.3V, unless otherwise noted ) Symbol tsu (PD) trec (PD) Parameter Power down set up time Power down recovery time.

The M5M5256DFP,VP,RV is 262,144-bit CMOS static RAMs organized as 32,768-words by 8-bits which is fabricated using high-performance 3 polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery results in a high density and l.

M5M5256DFP-70VLL-I

M5M5256DFP-70VLL-W

M5M5256DFP-70VXL

M5M5256DFP-70VXL-I

M5M5256DFP-10VLL

M5M5256DFP-10VLL-I

M5M5256DFP-10VXL

M5M5256DFP-10VXL-I

M5M5256DFP-12VLL

M5M5256DFP-12VLL-I

M5M5256DFP-12VXL

M5M5256DFP-12VXL-I

M5M5256DFP-15VLL