Datasheet4U Logo Datasheet4U.com

M66257FP - 5120 x 8-BIT x 2 LINE MEMORY (FIFO)

General Description

The M66257FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit double configuration which uses high-performance silicon gate CMOS process technology.

Key Features

  • Memory configuration of 5120 words × 8 bits × 2 (dynamic memory).
  • High-speed cycle 25ns (Min. ).
  • High-speed access 18ns (Max. ).
  • Output hold 3ns (Min. ).
  • Fully independent, asynchronous write and read operations.
  • Output 3 states.
  • Q00 to Q07 1-line delay.
  • Q10 to Q17 2-line delay.

📥 Download Datasheet

📁 Similar Datasheet

Part Number Description Manufacturer
M66282FP 8192 x 8-Bit Line Memory Renesas
M66291GP ASSP (USB2.0 Device Controller) Renesas
M66291HP ASSP (USB2.0 Device Controller) Renesas
M66 IMPLE MELODY GENERATOR Micro Electronics
M660 DUAL SAW / SELECTABLE FREQUENCY VCSO Integrated Circuit Systems

Other Datasheets by Mitsubishi Electric

Part Number Description
M66250FP 5120 X 8-BIT LINE MEMORY(FIFO/LIFO)
M66250P 5120 X 8-BIT LINE MEMORY(FIFO/LIFO)
M66252FP 1152 x 8-BIT LINE MEMORY FIFO
M66252P 1152 x 8-BIT LINE MEMORY FIFO
M66255FP 8192 x 10-BIT LINE MEMORY (FIFO)

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MITSUBISHI MITSUBISHI 〈DIGITAL 〈DIGITAL ASSP ASSP 〉 〉 M66257FP M66257FP 5120 × 8-BIT 2 LINE MEMORY (FIFO) 5120 × 8-BIT × 2×LINE MEMORY (FIFO) DESCRIPTION The M66257FP is a high-speed line memory with a FIFO (First In First Out) structure of 5120-word × 8-bit double configuration which uses high-performance silicon gate CMOS process technology. It allows simultaneous output of 1-line delay data and 2-line delay data, and is most suitable for data correction over multiple lines. It has separate clock, enable and reset signals for write and read, and is most suitable as a buffer memory between devices with different data processing throughput. FEATURES • Memory configuration of 5120 words × 8 bits × 2 (dynamic memory) • High-speed cycle .............................................