Datasheet Summary
MOSEL VITELIC
V54C3256(16/80/40)4V(T/S/B) 256Mbit SDRAM 3.3 VOLT, TSOP II / SOC BGA / WBGA PACKAGE 16M X 16, 32M X 8, 64M X 4
PRELIMINARY
6 System Frequency (fCK) Clock Cycle Time (tCK3) Clock Access Time (tAC3) CAS Latency = 3 Clock Access Time (tAC2) CAS Latency = 2 166 MHz 6 ns 5.4 ns 5.4 ns
7PC 143 MHz 7 ns 5.4 ns 5.4 ns
7 143 MHz 7 ns 5.4 ns 6 ns
8PC 125 MHz 8 ns 6 ns 6 ns
Features
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- 4 banks x 4Mbit x 16 organization 4 banks x 8Mbit x 8 organization 4 banks x16Mbit x 4 organization High speed data transfer rates up to 166 MHz Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge Single Pulsed RAS Interface Data Mask for Read/Write...
