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Mosel Vitelic Corp

V61C518256 Datasheet Preview

V61C518256 Datasheet

32K X 8 HIGH SPEED STATIC RAM

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MOSEL VITELIC
V61C518256
32K X 8 HIGH SPEED
STATIC RAM
PRELIMINARY
Features
s High-speed: 10, 12, 15 ns
s Low Power Dissipation:
– CMOS Standby: 0.5 mA (Max.)
s Fully static operation
s All inputs and outputs directly compatible
s Three state outputs
s Ultra low data retention current (VCC = 2V)
s Single 5V ± 10% Power Supply
s Packages
– 28-pin TSOP (Standard)
– 28-pin 300 mil SOJ
Description
The V61C518256 is a 262,144-bit static random
access memory organized as 32,768 words by 8
bits. It is built with MOSEL VITELIC’s high
performance CMOS process. Inputs and three-
state outputs are TTL compatible and allow for
direct interfacing with common system bus
structures.
Functional Block Diagram
A0
A1 VCC
GND
A6
Row
Decoder
512 x 512
Memory Array
A10
A13
A14
I/O0 Column I/O
Input
Data
Circuit
Column Decoder
I/O7
A2 A5 A11 A12
CE
OE
WE
Control
Circuit
518256-01
Device Usage Chart
Operating
Temperature
Range
0°C to 70 °C
Package Outline
TNR
•••
Access Time (ns)
10 12 15
•••
V61C518256 Rev. 0.3 July 1998
1
Temperature
Mark
Blank




Mosel Vitelic Corp

V61C518256 Datasheet Preview

V61C518256 Datasheet

32K X 8 HIGH SPEED STATIC RAM

No Preview Available !

MOSEL VITELIC
Pin Descriptions
A0–A14 Address Inputs
These 15 address inputs select one of the 32,768 x
8 bit segments in the RAM.
CE Chip Enable Inputs
CE is an active LOW input. Chip Enable must be
LOW when reading from or writing to the device.
When HIGH, the device is in standby mode with I/O
pins in the high impedance state.
OE Output Enable Input
The Output Enable input is active LOW. When OE
is LOW with CE LOW and WE HIGH, data of the
selected memory location will be available on the
I/O pins. When OE is HIGH, the I/O pins will be in
the high impedance state.
V61C518256
WE Write Enable Input
An active LOW input, WE input controls read and
write operations. When CE and WE inputs are both
LOW, the data present on the I/O pins will be
written into the selected memory location.
I/O0–I/O7 Data Input and Data Output Ports
These 8 bidirectional ports are used to read data
from and write data into the RAM.
VCC
GND
Power Supply
Ground
Pin Configurations (Top View)
28-Pin SOJ
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
518256-01
VCC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
OE
A11
A9
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
28-Pin TSOP (Standard)
22 21 A10
23 20 CE
24 19 I/O7
25 18 I/O6
26 17 I/O5
27 16 I/O4
28 15 I/O3
1 14 GND
2 13 I/O2
3 12 I/O1
4 11 I/O0
5 10 A0
6 9 A1
7 8 A2
518256-03
V61C518256 Rev. 0.3 July 1998
2


Part Number V61C518256
Description 32K X 8 HIGH SPEED STATIC RAM
Maker Mosel Vitelic Corp
Total Page 12 Pages
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