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Mosel Vitelic Corp

V62C18164096 Datasheet Preview

V62C18164096 Datasheet

256K x 16/ CMOS STATIC RAM

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MOSEL VITELIC V62C18164096
256K x 16, CMOS STATIC RAM
PRELIMINARY
Features
s High-speed: 85, 100 ns
s Ultra low CMOS standby current of 2µA (max.)
s Fully static operation
s All inputs and outputs directly TTL compatible
s Three state outputs
s Ultra low data retention current (VCC = 1.0V)
s Operating voltage: 1.8V – 2.3V
s Packages
– 48-Ball CSP BGA (8mm x 10mm)
Description
The V62C18164096 is a 4,194,304-bit static
random-access memory organized as 262,144
words by 16 bits. Inputs and three-state outputs are
TTL compatible and allow for direct interfacing with
common system bus structures.
Functional Block Diagram
A0 VCC
GND
A6
Row
1024 x 4096
Decoder
Memory Array
A7
A8
A9
I/O1
I/O16
Input
Data
Circuit
Column I/O
Column Decoder
UBE
LBE
OE
WE
CE1
CE2
Control
Circuit
Device Usage Chart
Operating Temperature
Range
0°C to 70°C
–40°C to +85°C
Package Outline
B
A10
Access Time (ns)
85 100
••
••
A17
Power
L LL
••
Temperature
Mark
Blank
I
V62C18164096 Rev. 1.2 June 2000
1




Mosel Vitelic Corp

V62C18164096 Datasheet Preview

V62C18164096 Datasheet

256K x 16/ CMOS STATIC RAM

No Preview Available !

MOSEL VITELIC
Pin Descriptions
A0–A17
Address Inputs
These 18 address inputs select one of the 256K x
16 bit segments in the RAM.
CE1, CE2 Chip Enable Inputs
CE1 is active LOW and CE2 is active HIGH. Both
chip enables must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
OE Output Enable Input
The output enable input is active LOW. With the
chip enabled, when OE is Low and WE High, data
will be presented on the I/O pins. The I/O pins will
be in the high impedance state when OE is High.
V62C18164096
UBE, LBE Byte Enable
Active low inputs. These inputs are used to enable
the upper or lower data byte.
WE Write Enable Input
The write enable input is active LOW and controls
read and write operations. With the chip enabled,
when WE is HIGH and OE is LOW, output data will
be present at the I/O pins; when WE is LOW and
OE is HIGH, the data present on the I/O pins will be
written into the selected memory locations.
I/O1–I/O16 Data Input and Data Output Ports
These 16 bidirectional ports are used to read data
from and write data into the RAM.
VCC
GND
Power Supply
Ground
Pin Configurations (Top View)
48 BGA
1 23456
A
B
C
D
E
F
G
H
TOP VIEW
123
A BLE OE A0
B I/O9 BHE A3
C I/O10 I/O11 A5
4 56
A1 A2 CE2
A4 CE1 I/O1
A6 I/O2 I/O3
D VSS I/O12 A17 A7 I/O4 VCC
E VCC I/O13 NC A16 I/O5 VSS
F I/O15 I/O14 A14 A15 I/O6 I/O7
G I/O16 NC A12 A13 WE I/O8
H NC A8 A9 A10 A11 NC
Note: NC means no connect.
TOP VIEW
V62C18164096 Rev. 1.2 June 2000
2


Part Number V62C18164096
Description 256K x 16/ CMOS STATIC RAM
Maker Mosel Vitelic Corp
Total Page 10 Pages
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