2N4012
12 2N40 (SILICON)
~E3~ (TO- 60) stud isolated from case
NPN silicon annular transistor, designed for frequency multiplication applications.
MAXI MUM RATI NGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Collector-Emitter Voltage
Collector-Emitter Voltage (VEB(off) = 1. 5 Vdc)
VCEO VCEV
Collector-Base Voltage
Emitter-Base Voltage
Collector Current
Total Device Dissipation @ TA = 25°C
Derate Above 25°C
Operating and Storage Junction Temperature Range TJ,Tstg
Value
40 65
65 4.0 1.5 11.6 66.3 -65 to +200
Unit
Vdc Vdc
Vdc Vdc Amps Watts m W;o C °c
FIGURE 1
- TRIPLER TEST CIRCUIT h .=. f,.~ 334 MHz
+28 V r-
- -
- -
- -17JZZ2'~:zzzzzzzz~Iti ZZ02.Z2zpmfzzz:ZZZZZZZZzmzzzz:~
2.7!l
O.s..IOp F
1000 pf
RFC I ~ 0.22 /LH RFC, ~ 0.33 OHMS, W. W. RESISTOR
L, ~ 2 TURNS, lio' DIAMETER, NO. 16 WIR~ L, ~ 1/16" WIDTH COPPER STRIP,lio' LONG L, ~ 2 TURNS, %" DIAMETER, NO. 18 WIRE
4 ~ IY.! TURNS,li" DIAMETER, 1/16" COPp ER STRIP
OUTPUT CAVITY ~ 114" X 114" X 214" CENTER...
