56F805 Description
Freescale Semiconductor, Inc. 12.0, 02/2004 56F805 Technical Data 56F805 16-bit Hybrid Controller Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions: 56F805 Block Diagram © Motorola, Inc., 2004.
56F805 Key Features
- Digital Signal Processing Core
56F805 Applications
- includes TCS pin which is reserved for factory use and is tied to VSS