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56F805 - 16-bit Hybrid Controller

Description

Two General Purpose Quad Timers totaling six pins: Timer C with two pins and Timer D with four pins CAN 2.0 B Module with 2-pin port for transmit and receive Two Serial Communication Interfaces, each with two

Features

  • 1.1.1.
  • Digital Signal Processing Core Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators, including extension bits 16-bit bidirectional barrel shifter Parallel instruction set with unique DSP addressing modes Hardware DO and REP loops Three internal a.

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Full PDF Text Transcription

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www.DataSheet4U.com Freescale Semiconductor, Inc. DSP56F805/D Rev. 12.0, 02/2004 56F805 Technical Data 56F805 16-bit Hybrid Controller • • Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14 addressing modes 31.
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