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AN555 Datasheet

Mounting Stripline Opposed Emitter Transistor

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MOTOROLA
SEMICONDUCTOR
APPLICATION NOTE
Order this document
by AN555/D
AN555
MOUNTING STRIPLINE-OPPOSED-EMITTER (SOE)
TRANSISTORS
Prepared by: Lou Danley
INTRODUCTION
The Stripline Opposed Emitter (SOE) package presently
used by Motorola for a number of rf power transistors
represents a major advancement in high frequency and
www.DataSheet4thUe.crommal performance. This Application Note discusses the
SOE package, its advantages and limitations as well as a
number of considerations to avoid improper usage.
An understanding of a few basic principles in regard to
mounting and heat-sinking of this package can help avoid
cases of poor performance or device damage.
Two general package types — the stud-mounted and
flange-mounted SOE packages will be discussed. Each of
the general types is available in a variety of sizes. Typical
package outlines of the two SOE packages are shown in
Figure 1.
ADVANTAGES OF THE SOE PACKAGE
The primary electrical advantages of the SOE packages
are the low inductance strip line leads which interface very
well with the microstrip lines often used in UHF-VHF
equipment and the good collector to base isolation provided
by the two emitter leads. The two emitter concept promotes
symmetry in board layout when combining devices to obtain
higher output power. Both emitter leads should always be
used for best performance.
DESCRIPTION OF THE SOE PACKAGE
Figure 2 displays the component parts on a stud-mounted
SOE package. This package will be used as an example
since both the stud and flange-mounted packages are very
similar in construction. The body of the package is a Berylium
Oxide (BeO) disc. Berylium Oxide was chosen due to its high
thermal conductivity. Attached to the bottom of the disc is
a copper stud which is for heat transfer and mechanical
mounting. The lead frame is attached to a metalized pattern
on to the top surface of the BeO disc. The actual shape of
the leads differs between the various package types. Finally
an Alumina ceramic cap is attached to the top of the disc
over the leads providing a protective cover for the transistor
die.
An understanding of the basic structure of the SOE
package is essential to proper usage of these devices in
respect to heat-sinking and mechanical mounting. Since
these two areas present the greatest problem to users, they
will be discussed in detail.
HEAT-SINKING THE SOE PACKAGE
In order to properly understand the thermal considerations
involved in mounting SOE type packages, it is necessary
to lay some groundwork in the area of heat flow. Table 1
gives equivalent Thermal and Electrical parameters which
may be used to relate Thermal properties to more familiar
electrical units.
Semiconductor power devices are usually guaranteed to
have a certain thermal performance as stated by the thermal
resistance of the device from the junction to the case, or
mounting surface — θJC. How to get the heat out of the case
has generally been left to the user. In any dynamic heat flow
problem, the heat must go somewhere, otherwise there will
be a continuous rise in the temperature of the system. In
text books, there always seems to be an “infinite heat sink”
©RMFotAoroplap, lInicc.a1t9i9o3n Reports
Figure 1. SOE Packages
1


Motorola Electronic Components Datasheet

AN555 Datasheet

Mounting Stripline Opposed Emitter Transistor

No Preview Available !

AN555
Transistor
Chip
Ceramic
Cap
Leads
Metallic
Pattern
www.DataSheet4U.com
Surface
S
BeO
Disc
Wrench
Flat
Figure 2. Component Parts of SOE Package
Table 1. Thermal Parameters and Their Electrical
Analogs
Thermal
Symbol Parameter
T Temperature
difference
Units*
°C
Electrical Analog
Symbol Parameter
V Voltage
H Heat flow
watts
I Current
θ
Thermal
°C/watt
resistance
R Resistance
γ
Heat
watt-sec/°C
C
Capacity
capacity
K
Thermal
cal/sec-
conductivity
cm-°C
σ Conductivity
Q Quantity of
heat
cal
q Charge
t Time sec t Time
θγ Thermal
time
constant
sec
RC Time
constant
* Note the one major difference in thermal and electrical units; Q is in
units of energy, whereas q is simply a charge. Hence H is in units of
power and may be equated to an electrical power dissipation.
available which can absorb any amount of heat with no tem-
perature rise whatsoever. In the practical sense, however,
such a heat sink does not really exist. Practical heat sinks
must be characterized by a certain temperature rise for a giv-
en ambient condition, with a known amount of heat input
(power to be dissipated) after equilibrium conditions have
been achieved. Characterization of heat-sink systems is best
achieved by examining the complete system under con-
trolled conditions.
For example, the normal environment for a land-mobile
VHF transmitter might be the trunk of a taxi cab in the hot
Arizona summer. In such an environment, temperatures
might reach as high as 80°C (176°F). The heat-sink system
for such a radio should therefore be tested at a minimum
ambient temperature of 80°C. The method that should be
applied in this test would utilize a fine wire thermocouple
rigidly secured to the stud of the rf power transistor for which
the test is being conducted. The system, which in this case
would include all parts of the radio which would contribute
heat, should then be operated under maximum heat
generating conditions, in the high temperature environment
specified. Careful measurement of the temperature of the
device under test would then give the difference in
temperature between the case of the transistor and the
controlled ambient.
If the case and ambient temperatures are known, as well
as the power levels in the transistor, the thermal resistance
from the transistor case to the ambient can be calculated.
The first step is to obtain the power being dissipated by the
device.
Pd = P1 + P2 – P3
(1)
where: Pd = power being dissipated by the transistor in
watts;
P1 = dc power into the transistor in watts;
P2 = rf power into the transistor in watts;
P3 = rf power out of the transistor in watts.
This value of Pd is used to obtain the θCA value from the
equation:
θCA =
TC – TA
Pd
(2)
where: θCA = thermal resistance device case to ambient;
TC = device case temperature;
TA = ambient temperature.
In order to determine the maximum temperature rise in
the transistor element (junction temperature rise) under any
given operating condition the following equation may be
used.
Tj = (θJC + θCA) Pd + TA
(3)
where: Tj = junction temperature;
θJC = published thermal resistance —
junction to case.
If power is dissipated in a power transistor, the case
temperature will rise above the ambient temperature by an
amount determined by θJC and θCA. Since the value to θJC
is fixed by the transistor type being used, θCA is the only
factor with which the user can control the junction
temperature for a given power dissipation.
Since heat generated by the transistor must be radiated
to the ambient by the heat sink, a low θCA requires an
effective heat sink. In general, an efficient heat sink requires
that material with high thermal conductivity and high specific
heat be used. A table of thermal properties for various
materials is given in the Appendix. A well-designed heat sink
requires that all thermal paths be as short as possible and
of maximum cross-sectional area. Examples of thermal
resistance calculations for a bar and a flat disc of thermal
conducting material are given in the Appendix.
The equations given in the Appendix however, assume
no thermal resistance between the case and the heat sink.
2 RF Application Reports


Part Number AN555
Description Mounting Stripline Opposed Emitter Transistor
Maker Motorola
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