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MC100E154 - 5-BIT 2:1 MUX-LATCH

Download the MC100E154 datasheet PDF. This datasheet also covers the MC10E154 variant, as both devices belong to the same 5-bit 2:1 mux-latch family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (MC10E154-Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5ĆBit 2:1 MuxĆLatch The MC10E/100E154 contains five 2:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 (or both) latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW. • 850ps Max. LEN to Output • 825ps Max. D to Output • Differential Outputs • Asynchronous Master Reset • Dual Latch-Enables • Extended 100E VEE Range of – 4.2V to – 5.
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