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MC100H602 - 9-Bit Latch TTL/ECL Translator

This page provides the datasheet information for the MC100H602, a member of the MC10H602 9-Bit Latch TTL/ECL Translator family.

Datasheet Summary

Features

  • D.
  • type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post.
  • latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.
  • 9.
  • Bit Ideal for Byte.
  • Parity.

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Datasheet preview – MC100H602

Datasheet Details

Part number MC100H602
Manufacturer Motorola
File Size 83.96 KB
Description 9-Bit Latch TTL/ECL Translator
Datasheet download datasheet MC100H602 Datasheet
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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9-Bit Latch TTLā/āECL Translator The MC10H/100H602 is a 9–bit, dual supply TTL to ECL translator with latch. Devices in the Motorola 9–bit translator series utilize the 28–lead PLCC for optimal power pinning, signal flow–through and electrical performance. The H602 features D–type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post–latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.
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