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MC100H602 - 9-Bit Latch TTL/ECL Translator

Download the MC100H602 datasheet PDF. This datasheet also covers the MC10H602 variant, as both devices belong to the same 9-bit latch ttl/ecl translator family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • D.
  • type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post.
  • latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.
  • 9.
  • Bit Ideal for Byte.
  • Parity.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MC10H602-Motorola.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
MC100H602 9-Bit Latch TTL/ECL Translator ON Semiconductor
MC100H600 9-Bit TTL/ECL Translator ON Semiconductor
MC100H601 9-Bit ECL/TTL Translator ON Semiconductor
MC100H603 9-Bit Latch ECL/TTL Translator ON Semiconductor
MC100H604 Registered Hex TTL/ECL Translator ON Semiconductor

Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC100H600 9-Bit TTL to ECL Translator
MC100H601 9-Bit ECL/TTL Translator
MC100H603 9-Bit Latch ECL/TTL Translator
MC100H604 Registered Hex TTL/ECL Translator
MC100H605 Registered Hex ECL/TTL Translator

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9-Bit Latch TTLā/āECL Translator The MC10H/100H602 is a 9–bit, dual supply TTL to ECL translator with latch. Devices in the Motorola 9–bit translator series utilize the 28–lead PLCC for optimal power pinning, signal flow–through and electrical performance. The H602 features D–type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post–latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.