Datasheet Summary
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
6ĆBit 2:1 MuxĆLatch
The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single-ended outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 (or both) latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW.
- 850ps Max. LEN to Output
- 825ps Max. D to Output
- Single-Ended Outputs
- Asynchronous Master Reset
- Dual Latch-Enables
- Extended 100E VEE Range of
- 4.2V to
- 5.46V
- 75kΩ Input Pulldown Resistors
Pinout: 28-Lead PLCC (Top View) D5a D4b...
