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MC10E155 - 5VECL 6-Bit 2:1 Mux-Latch

Datasheet Summary

Description

The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single

ended outputs.

When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL.

Features

  • 850 ps Max. LEN to Output.
  • 825 ps Max. D to Output.
  • Single.
  • Ended Outputs.
  • Asynchronous Master Reset.
  • Dual Latch.
  • Enables.
  • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V.
  • NECL Mode Operating Range: VCC = 0 V with VEE =.
  • 4.2 V to.
  • 5.7 V.
  • Internal Input 50 kW Pulldown Resistors.
  • ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V.
  • Meets or Exceeds JE.

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Datasheet Details

Part number MC10E155
Manufacturer ON Semiconductor
File Size 121.30 KB
Description 5VECL 6-Bit 2:1 Mux-Latch
Datasheet download datasheet MC10E155 Datasheet
Additional preview pages of the MC10E155 datasheet.

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Full PDF Text Transcription

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MC10E155, MC100E155 5V ECL 6−Bit 2:1 Mux−Latch Description The MC10E/100E155 contains six 2:1 multiplexers followed by transparent latches with single−ended outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output data is controlled by the multiplexer select control, SEL. A logic HIGH on either LEN1 or LEN2 (or both) latches the outputs. The Master Reset (MR) overrides all other controls to set the Q outputs LOW. The 100 Series contains temperature compensation. Features • 850 ps Max. LEN to Output • 825 ps Max. D to Output • Single−Ended Outputs • Asynchronous Master Reset • Dual Latch−Enables • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.
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