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MC10H602 - 9-Bit Latch TTL/ECL Translator

Key Features

  • D.
  • type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post.
  • latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.
  • 9.
  • Bit Ideal for Byte.
  • Parity.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 9-Bit Latch TTLā/āECL Translator The MC10H/100H602 is a 9–bit, dual supply TTL to ECL translator with latch. Devices in the Motorola 9–bit translator series utilize the 28–lead PLCC for optimal power pinning, signal flow–through and electrical performance. The H602 features D–type latches. Latching is controlled by Latch Enable (LEN), while the Master Reset input resets the latches. A post–latch logic enable is also provided (ENECL), allowing control of the output state without destroying latch data. All control inputs are ECL level. The 10H version is compatible with MECL 10H ECL logic levels. The 100H version is compatible with 100K levels.