MCM67B518 ram equivalent, 32k x 18 bit burstram synchronous fast static ram.
ssible i486 and Pentium bus cycles.
CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)
Parameter Input Capacitance (All Pins .
Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the ove.
Image gallery
Download