MCM67J618B ram equivalent, 64k x 18 bit burstram synchronous fast static ram.
n = 0 to VCC) Output Leakage Current (G = VIH) AC Supply Current (G = VIH, E = VIL, Iout = 0 mA, All Inputs = VIL or VIH, VIL = 0.0 V and VIH ≥ 3.0 V, Cycle Time ≥ tKHKH .
Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the ove.
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