MCM6926A memory equivalent, 128k x 9 bit fast static random access memory.
AST SRAM
WRITE CYCLE 2 (E Controlled, See Notes 1 and 2)
6926A
–8 P Parameter Write Cycle Time Address Setup Time Address Valid to End of Write Enable to .
minimization or elimination of bus contention conditions is necessary during read and write cycles. 3. All read cycle t.
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