128K Datasheet | Specifications & PDF Download

Features • Single Supply for Read and Write: 2.7 to 3.6V • Fast Read Access Time – 55 ns • Internal Program Control and Timer • Sector Architecture –

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SRAM FEATURES • High speed: 12, 15, 17,20,25 and 35ns • High-perfonnance, low-power, CMOS double-metal process • Single +5V ±10% power supply • Easy

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® LY62L1024 Rev. 1.2 128K X 8 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Description Initial Issue Revised Icc De

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A62S7308B Series Preliminary 128K X 8 BIT LOW VOLTAGE CMOS SRAM Document Title 128K X 8 BIT LOW VOLTAGE CMOS SRAM Revision History Rev. No. 0.0 0

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1-MBIT (128K x 8) BOOT BLOCK FLASH MEMORY 28F001BX-T 28F001BX-B 28F001BN-T 28F001BN-B Y High-Integration Blocked Architecture One 8 KB Boot Block w L

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M29F200BT M29F200BB 2 Mbit (256Kb x8 or 128Kb x16, Boot Block) Single Supply Flash Memory PRELIMINARY DATA s SINGLE 5V±10% SUPPLY VOLTAGE for PROGRAM

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IS62C1024AL IS65C1024AL 128K x 8 LOW POWER CMOS STATIC RAM FEATURES • High-speed access time: 35, 45 ns • Low active power: 100 mW (typical) • Low sta

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September 2004 Preliminary Information ® AS9C25256M2036L AS9C25128M2036L www.DataSheet4U.com 2.5V 256/128K X 36 Synchronous Dual-port SRAM with 3.3V

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IS61C1024 IS61C1024L 128K x 8 HIGH-SPEED CMOS STATIC RAM ISSI® MAY 1999 FEATURES • High-speed access time: 12, 15, 20, 25 ns • Low active power: 600

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P4C1024 HIGH SPEED 128K x 8 DUAL CHIP ENABLE CMOS STATIC RAM FEATURES High Speed (Equal Access and Cycle Times) — 15/20/25/35 ns (Commercial/Industria

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M29F010B 1 Mbit (128Kb x8, Uniform Block) Single Supply Flash Memory PRELIMINARY DATA s SINGLE 5V±10% SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPER

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www.DataSheet4U.com www.DataSheet4U.com www.DataSheet4U.com

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UICRON 1-· M', OCOW, ' ' PRELIMINARY MT5LC128K8D4 REVOLUTIONARY PINOUT 128K x 8 SRAM SRAM FEATURES • All I/O pins are SV tolerant • High speed:

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MIC:RON 1-· ' SRAM FEATURES • High speed: 15*, 17,20,25 and 35ns • High-performance, low-power, CMOS double-metal process • Automatic CE power down

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P4C1024 P4C1024 HIGH SPEED 128K x 8 CMOS STATIC RAM FEATURES High Speed (Equal Access and Cycle Times) — 15/17/20/25/35 ns (Commercial) — 20/25/35/45

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www.DataSheet4U.com PDM41024 1 Megabit Static RAM 128K x 8-Bit Features n 1 2 3 4 5 6 7 Description The PDM41024 is a high-performance CMOS static

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® LY6212816 Rev. 1.3 128K X 16 BIT LOW POWER CMOS SRAM REVISION HISTORY Revision Rev. 1.0 Rev. 1.1 Rev. 1.2 Description Initial Issue Added -45 ns

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Features • Fast Read Access Time – 120 ns • Automatic Page Write Operation – Internal Address and Data Latches for 128 Bytes – Internal Control Timer

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28F010 1024K (128K x 8) CMOS FLASH MEMORY Y Flash Electrical Chip-Erase 1 Second Typical Chip-Erase Y Quick Pulse Programming Algorithm 10 ms Typical

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AT29C010A Features • • • • • • • • • • • • • Fast Read Access Time - 70 ns 5-Volt-Only Reprogramming Sector Program Operation Single Cycle Reprogram

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